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| SSM9928O N-CHANNEL ENHANCEMENT MODE POWER MOSFET PRODUCT SUMMARY Low on-resistance Capable of 2.5V gate drive Optimal DC/DC battery application S1 S2 D1 G1 G2 D2 DESCRIPTION The Advanced Power MOSFETs from Silicon Standard Corp. provide the designer with the best combination of fast switching, ruggedized device design, ultra low on-resistance and cost-effectiveness. BVDSS RDS(ON) ID 20V 23m 5A G2 S2 Pb-free; RoHS-compliant D2 S2 TSSOP-8 S1 D1 G1 S1 ABSOLUTE MAXIMUM RATINGS Symbol VDS VGS ID@TA=25 ID@TA=70 IDM PD@TA=25 TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Drain Current , VGS @ 4.5V Drain Current , VGS @ 4.5V Pulsed Drain Current 1 3 3 Rating 20 12 5 3.5 25 1 0.008 -55 to 150 -55 to 150 Units V V A A A W W/ Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range THERMAL DATA T Symbol Rthj-a Parameter Thermal Resistance Junction-ambient 3 Value Max. 125 Unit /W 03/11/2007 Rev.1.00 www.SiliconStandard.com 1 SSM9928O ELECTRICAL CHARACTERISTICS Symbol BVDSS BVDSS/Tj @Tj=25 C(unless otherwise specified) o Parameter Drain-Source Breakdown Voltage 2 Test Conditions VGS=0V, ID=250uA Min. 20 0.5 - Typ. 0.02 21 15.9 1.5 7.4 6.2 9 30 11 530 245 125 Max. Units 23 29 1 25 10 V V/ m m V S uA uA uA nC nC nC ns ns ns ns pF pF pF Breakdown Voltage Temperature Coefficient Reference to 25, ID=1mA RDS(ON) Static Drain-Source On-Resistance VGS=4.5V, ID=5A VGS=2.5V, ID=2A VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C) o o VDS=VGS, ID=250uA VDS=10V, ID=5A VDS=20V, VGS=0V VDS=20V ,VGS=0V VGS=12V ID=5A VDS=10V VGS=4.5V VDS=10V ID=1A RG=3.3,VGS=4.5V RD=10 VGS=0V VDS=20V f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 SOURCE-DRAIN DIODE Symbol IS VSD Parameter Continuous Source Current ( Body Diode ) Test Conditions VD=VG=0V,VS=1.2V Tj=25,IS=5A,VGS=0V Min. - Typ. - Max. Units 0.83 1.2 A V Forward On Voltage 2 Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 208/W when mounted on Min. copper pad. 03/11/2007 Rev.1.00 www.SiliconStandard.com 2 SSM9928O 30 30 4.5V 3.5V 3.0V 2.5V ID , Drain Current (A) ID , Drain Current (A) 20 20 4.5V 3.5V 3.0V 2.5V V GS =2.0V 10 V GS =2.0V 10 T C =25 o C 0 0 1 2 3 4 0 0 1 2 3 T C =150 o C 4 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 95 1.9 I D = 5A T C =25 o C 1.5 I D = 5A V GS = 4.5V Normalized R DS(ON) 65 RDS(ON) (m ) 1.1 35 0.7 5 1 2 3 4 5 6 0.3 -50 0 50 100 150 V GS (V) T j , Junction Temperature ( o C) Fig 3. On-Resistance v.s. Gate Voltage Fig 4. Normalized On-Resistance v.s. Junction Temperature 03/11/2007 Rev.1.00 www.SiliconStandard.com 3 SSM9928O A 6 1.2 5 0.9 ID , Drain Current (A) 4 PD (W) 25 50 75 100 125 150 3 0.6 2 0.3 1 0 0 0 50 100 150 T c , Case Temperature ( C) o T c , Case Temperature ( o C) Fig 5. Maximum Drain Current v.s. Fig 6. Typical Power Dissipation Case Temperature 100 1 Duty Factor = 0.5 10 100us 1ms 10ms Normalized Thermal Response (R thja) 0.2 0.1 0.1 0.05 ID (A) 1 0.02 0.01 100ms 0.1 PDM 0.01 Single Pulse t T 1s T C =25 C Single Pulse 0.01 o Duty Factor = t/T Peak Tj = P DM x Rthja + Ta Rthja=208 oC/W DC 0.001 1 10 100 0.0001 0.001 0.01 0.1 1 10 100 1000 0.1 V DS (V) t , Pulse Width (s) Fig 7. Maximum Safe Operating Area Fig 8. Effective Transient Thermal Impedance 03/11/2007 Rev.1.00 www.SiliconStandard.com 4 SSM9928O f=1.0MHz 8 10000 I D =5A 7 VGS , Gate to Source Voltage (V) 6 5 4 C (pF) V DS =10V V DS =15V V DS =20V 1000 Ciss Coss Crss 100 3 2 1 0 0 5 10 15 20 25 10 1 7 13 19 25 Q G , Total Gate Charge (nC) V DS (V) Fig 9. Gate Charge Characteristics Fig 10. Typical Capacitance Characteristics 100 1.6 10 1.2 IS (A) VGS(th) (V) T j =150 o C 1 T j =25 o C 0.8 0.1 0.4 0.01 0.2 0.5 0.8 1.1 0 -50 0 50 100 150 Junction Temperature ( o C ) V SD (V) Fig 11. Forward Characteristic of Reverse Diode Fig 12. Gate Threshold Voltage v.s. Junction Temperature 03/11/2007 Rev.1.00 www.SiliconStandard.com 5 A SSM9928O RD VDS 90% VDS RG D G TO THE OSCILLOSCOPE 0.5 x RATED VDS + 4.5V - S VGS 10% VGS td(on) tr td(off) tf Fig 13. Switching Time Circuit Fig 14. Switching Time Waveform VG VDS TO THE OSCILLOSCOPE D G 0.5 x RATED VDS QG 4.5V QGS QGD S + VGS 1~ 3 mA IG ID Charge Q Fig 15. Gate Charge Circuit Fig 16. Gate Charge Waveform Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 03/11/2007 Rev.1.00 www.SiliconStandard.com 6 |
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